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NXP Diamond™ package
NXP Diamond™ package |
Introduction
NXP continues to lead the logic industry with the world's smallest logic package!
NXP's new Diamond package is over 25 percent smaller than our smallest XSON package (suffix GN), previously the world's smallest package.
Yet, while this game-changing Diamond package is a tiny 0.8mm square by only 0.35mm high, its breakthrough design retains the traditional 0.5mm pad pitch which allows simplified PCB assembly.
Key Features
- Sampling now with volume production in August, 2012
- Just 0.8mm x 0.8mm x 0.35mm (WxLxH)
- Easy-to-use 0.5mm lead pitch
- All 5-lead AUP and LVC functions will be offered
- GX package code suffix (SOT1226 package)
Our tiny Diamond package is up to 12.7 times smaller than alternative 5-pin packages, yet it uses the same internal die as our other packages such as MicroPak™ (XSON) and PicoGate, so identical electrical performance is assured.
Its tiny size saves valuable board real estate, while the 0.5mm pad pitch allows it to be used in existing 0.5mm pitch assembly processes.
This eliminates the need for a costly/complex step-down mask during PCB solder printing.
The package is an ideal choice for leading-edge portable devices such as smartphones where PCB space is critical, yet offers cost savings due to simplified assembly.
Our Diamond package's larger pads offer easier component placement as well as improved strength, reliability, and thermal characteristics, while reducing the risk of shorts from solder bridging.
Miniaturization
The packaging trend, as driven by the market, has always been towards smaller, cheaper, and more reliable packages.
The large through-hole DIL packages were succeeded by the surface-mounted, flatter SO and TSSOP packages.
These leaded packages eventually gave way to leadless, ball-based BGA packages, which were difficult to solder/assemble, and finally to pad-based packages such as WCSP and DQFN.
In parallel, logic packages were driven smaller and smaller.
Single-/Dual-gate logic burst on to the scene with the leaded PicoGate and then the leadless MicroPak (XSON) packages, bringing further space savings.
NXP (previously Philips Semiconductors), with our vast experience in discretes packaging, has dominated this market with our ever-smaller, innovative packages.
Not only did we already have the two smallest logic packages in the world, with Diamond, we introduce the new, smallest logic package.
Now, we have the three smallest logic packages in the world, and the smallest of them also features the largest pitch of anything in its size range.
Below is a comparison of the latest, single-gate logic packages with pad-based designs, and ranked according to package footprint/size:
| Rank | Package | Suffix | Dimensions 1 | Pitch 1 |
| 1st | NXP Diamond | GX | 0.8 x 0.8 x 0.35 | 0.5 |
| 2nd | NXP MicroPak | GN | 0.9 x 1.0 x 0.35 | 0.3 |
| 3rd | NXP MicroPak | GS | 1.0 x 1.0 x 0.35 | 0.35 |
| 4th (Tie) | ON ULLGA | CMX | 1.0 x 1.0 x 0.4 | 0.35 |
| 4th (Tie) | TI PX2SON | DSF | 1.0 x 1.0 x 0.4 | 0.35 |
| 5th (Tie) | NXP MicroPak | GF | 1.0 x 1.0 x 0.5 | 0.35 |
| 5th (Tie) | Toshiba fsV | FS | 1.0 x 1.0 x 0.5 | 0.35 |
| 6th (Tie) | Fairchild MicroPak2 | FHX | 1.0 x 1.0 x 0.55 | 0.35 |
| 6th (Tie) | ON UDFN | MUT | 1.0 x 1.0 x 0.55 | 0.35 |
| 7th | ON ULLGA | BMX | 1.2 x 1.0 x 0.4 | 0.4 |
| 8th | ON UDFN | AMUT | 1.2 x 1.0 x 0.55 | 0.4 |
| 9th | ON ULLGA | AMX | 1.45 x 1.0 x 0.4 | 0.5 |
| 10th | NXP MicroPak | GM | 1.45 x 1.0 x 0.5 | 0.5 |
| 11th (Tie) | Fairchild MicroPak | L6X | 1.45 x 1.0 x 0.55 | 0.5 |
| 11th (Tie) | ON UDFN | CMUT | 1.45 x 1.0 x 0.55 | 0.5 |
| 12th | TI PUSON | DRY | 1.45 x 1.0 x 0.6 | 0.5 |
Comparison of the Smallest Logic Packages in the Industry
1 All dimensions are listed in millimeters (mm).
Body/Footprint dimensions are listed as length x width x height.
Height is maximum vertical distance from PCB while other dimensions are nominal.
MicroPak
Diamond, formally known as X2SON, is the next generation of MicroPak, also known as XSON.
NXP's MicroPak has become the most-successful of the single-/dual-/triple-gate logic packages due to its many advantages.
NXP's Diamond package benefits from many of the same advantages:
NXP MicroPak Advantages
- Same die in all packages for identical electrical performance
- Encapsulation protection against breakage, scratches, and environmental concerns
- Better mechanical performance (pull and sheer test results)
- Cheaper system solution overall
- Extended operating range of -40°C to +125°C
- Automotive qualified: JEDEC-STD-20C and Q100
- Pb-free, RoHS, and Dark Green compliant
Mechanical Performance
NXP's MicroPak package has all but obsoleted competing packages that still use solder balls or leads.
Handling and assembly during manufacturing are superior.
Further, MicroPak's mechanical pull and shear strength exceeds that of other popular ball and leaded packages.
Our MicroPak and Diamond packages withstand harsh conditions in automotive and personal, portable electronics.
NXP's MicroPak Best-In-Class Mechanical Performance Over Competing Packages
Pitch
With the trend of miniaturization came continued decreases in pitch, or the spacing between leads/pads.
Pad pitches went from an easy-to-assemble 0.65mm and 0.5mm to even smaller geometries of 0.4mm and even 0.3mm.
At these tiny pitches below 0.5mm, specialized and difficult/costly assembly/mounting techniques can be required.
Small Pitch Disadvantages
- Harder to mount onto the PCB
- Greater risk of shorts
- Requires costly "step-down" masks
- Restrictions on placement due to handling
With the Diamond Package's 0.5mm Pitch, Step-Down Masks are Not Required
Solution
While other competitors are still trying to catch up to our last, last smallest logic package, NXP again advances the market.
Our Diamond package is nearly half the volume of our competitors' smallest packages.
Not only does NXP have the most advanced logic package technology in the world, but we also have advanced wafer and die production capabilities.
Fact is that many competitors cannot make such tiny logic packages because their dies are too big to fit!
NXP elegantly addresses the disadvantages of small pitch while delivering the smallest logic package that inherits the benefits of our MicroPak products.
Our advanced manufacturing allows us to create a package that features a game-changing 0.5mm pad pitch.
Compared to competitors, you'd have to settle for a package that is over 2.5X bigger just to get the easy assembly of 0.5mm pitch.
Our Diamond package is currently being produced in a 5-lead configuration (SOT1226) for all our 5-pin AUP and LVC products.
Our customers are thrilled with our new Diamond package.
Unlike some competitor packages, our Diamond package is real and is either already in volume production to select customers or is sampling.
General availability and volume production for all products is expected in August, 2012.
To order a Diamond package, just look for our package suffix of GX at the end of the part number.
NXP is the largest volume manufacturer of logic in the world!
Our flexible manufacturing allows us to quickly use the same logic die in any number of PicoGate, MicroPak, or Diamond packages.
Our advanced and proven logistics allows us to supply the highest volume production requirements in the market.
If you need high volumes of a Diamond package in a family other than AUP or LVC, please contact us.
NXP can also create any custom logic part for your high-volume, special application.
Products
The Diamond package is being released for all 5-lead logic functions in the following families:
Products featuring our new Diamond package are shown below.
Please note, in some cases, the datasheets or website product pages are still being updated.
 | 74AUP1G00 | 1.8V single low-power 2-input NAND gate | |
| 74AUP1G02 | 1.8V single low-power 2-input NOR gate | |
| 74AUP1G04 | 1.8V single low-power inverter | |
| 74AUP1GU04 | 1.8V single low-power unbuffered inverter | |
| 74AUP1G06 | 1.8V single low-power inverter with open-drain output | |
| 74AUP1G07 | 1.8V single low-power buffer with open-drain output | |
| 74AUP1G08 | 1.8V single low-power 2-input AND gate | |
| 74AUP1G09 | 1.8V single low-power 2-input AND gate with open-drain output | |
| 74AUP1G14 | 1.8V single low-power schmitt-trigger inverter | |
| 74AUP1G17 | 1.8V single low-power schmitt-trigger buffer | |
| 74AUP1G32 | 1.8V single low-power 2-input OR gate | |
| 74AUP1G34 | 1.8V single low-power buffer | |
| 74AUP1T34 | 1.8V single low-power dual-supply voltage translating buffer | |
| 74AUP1G38 | 1.8V single low-power 2-input NAND gate with open-drain output | |
| 74AUP1G79 | 1.8V single low-power D-type flip-flop; positive-edge trigger | |
| 74AUP1G80 | 1.8V single low-power D-type flip-flop; positive-edge trigger | |
| 74AUP1G86 | 1.8V single low-power 2-input EXCLUSIVE-OR gate | |
| 74AUP1G125 | 1.8V single low-power buffer/line driver (3-state) | |
| 74AUP1Z125 | 1.8V single low-power X-tal driver with enable and internal resistor | |
| 74AUP1G126 | 1.8V single low-power buffer/line driver (3-state) | |
| 74AUP1G132 | 1.8V single low-power 2-input NAND Schmitt trigger | |
| 74AUP1G240 | 1.8V single low-power inverting buffer/line driver; 3-state | |
| 74LVC1G00 | 3.3V single 2-input NAND gate | |
| 74LVC1G02 | 3.3V single 2-input NOR gate | |
| 74LVC1G02-Q100 | 3.3V single 2-input NOR gate; AEC Q100 (Grade 1) qualified | |
| 74LVC1G04 | 3.3V single inverter | |
| 74LVC1G04-Q100 | 3.3V single inverter; AEC Q100 (Grade 1) qualified | |
| 74LVC1GU04 | 3.3V single inverter (unbuffered) | |
| 74LVC1G06 | 3.3V single inverter with open-drain outputs | |
| 74LVC1G07 | 3.3V single buffer with open-drain outputs | |
| 74LVC1G08 | 3.3V single 2-input AND gate | |
| 74LVC1G14 | 3.3V single schmitt-trigger inverter | |
| 74LVC1G17 | 3.3V single schmitt-trigger buffer | |
| 74LVC1G32 | 3.3V single 2-input OR gate | |
| 74LVC1G34 | 3.3V single buffer | |
| 74LVC1G38 | 3.3V single 2-input NAND gate with open-drain output | |
| 74LVC1G66 | Single 3.3V single-pole, single-throw bilateral analog switch (SPST-NO) | |
| 74LVC1G79 | 3.3V single D-type flip-flop; positive-edge trigger | |
| 74LVC1G80 | 3.3V single D-type flip-flop; positive-edge trigger | |
| 74LVC1G86 | 3.3V single 2-input EXCLUSIVE-OR gate | |
| 74LVC1G125 | 3.3V single buffer/line driver with active LOW output enable (3-state) | |
| 74LVC1G126 | 3.3V single buffer/line driver with active HIGH output enable (3-state) | |
| 74LVC1G384 | Single 3.3V single-pole, single-throw analog switch (SPST-NC) | |
Packaging
More Information
MicroPak is a trademark of Fairchild Semiconductor.
