GTL logic translators
These active voltage level translators provide bi-directional voltage translation between GTL-, GTL, and GTL+ voltage levels and LVTTL signal levels under hardware directional control at speeds up to about 100MHz. They are typically used in Intel processor-to-chip set interfaces but can be used in any voltage level translation opportunity.
General-purpose quad GTL-to-LVTTL translator with direction pin - The faster speeds of the GTL2005 are needed for synchronous operation whereas the slower GTL2014 can be used for asynchronous operation.
13-bit GTL-to-LVTTL translator has been designed for dual Intel Xeon processor server applications using the Lindenhurst chipset
Variant of the GTL2006 that includes power-good controls—a feature for next generation dual-processor server motherboards
GTL2008 and GTL2107
Variations on the GTL2007 that provide Hi-Z outputs during power up and down - The Texas Instruments SN74GTL2107 is an alternate source to the GTL2107.
Front-Side-Bus comparator that takes in the GTL signals from two different chipsets, compares them, and outputs the lowest Front-Side-Bus frequency to both processors
One half the GTL2014 in a single package to reduce cost and board space when 1 or 2 GTL traces are used
Slower (10ns vs. 2.5ns TTL-to-GTL tPD) version of the GTL2005 that allows VREF operation down to 0.5V with linear response
Twice the GTL2014 in a single package to reduce cost and board space when more than 4 GTL traces are used
A 4-bit GTL-to-GTL buffer (11.5ns maximum tPD) with the same footprint as the GTL2014 (DIR pin = no connect) that allows longer GTL traces than possible from weak 2mA GTL outputs on ASICs
A 16-bit, bi-directional GTL-to-LVTTL/TTL universal bus translator - It's function is similar to a 16501 standard logic function. The GTL1655 is configured as two 8-bit transceivers that share a clock and master output enable pin but which have individual latch timing. The output capability is ±24mA on the LVTTL (A port) side and is +100mA on the GTL (B port) side. Live insertion is supported via IOFF, power-up 3-state, and BIAS VCC.
An 18-bit, bi-directional GTL-to-LVTTL/TTL universal bus translator - It uses a similar pin-out as a 16601 standard logic function and can perform multiple different logic functions. The output capability is +64mA/-32mA on the LVTTL (A port) side and +40mA on the GTL (B port) side.
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GTL Logic Translators