I2C multiplexers and switches
Two-wire I2C-bus multiplexers and switches provide capacitive isolation when connecting an upstream I2C-bus to a desired combination of downstream buses. The software-controlled multiplexers and switches break the I2C-bus into two sub-branches, four sub-branches, or eight sub-branches. The multiplexers allow only one downstream sub-branch to be selected at a time while the switches allow any individual downstream sub-branch or combination of downstream sub-branches to be selected.
Once one or several sub-branches have been selected, the multiplexer or switch acts as a wire, allowing the master on the upstream I2C-bus to send commands to slaves on the active downstream sub-branches. Devices on the active downstream sub-branches can communicate with each other and the master. I2C-bus multiplexing allows for reliable switching of multiple system management buses and multiple I2C-bus devices and allows address expansion as well as addressing one of multiple identical devices, thus resolving address conflict issues. These devices have applications in all levels of computers including workstations, servers, and desktop PCs.
Some I2C devices may operate at different voltage levels from 3.3V SMBus devices, yet they are constrained to share a common bus. The multiplexers and switches are supply independent. Therefore, each channel can be pulled to a supply voltage ranging from 1.65V to 5.5V regardless of the ICs' supply voltage. This level translation is performed without the need of a second voltage supply or a second pair of input pull-up resistors.
The switches can be used both to resolve address conflicts and to perform voltage level translation at the same time. Also, downstream sub-branches on some switches and multiplexers have two or four 'alert' inputs for fault reporting. When a fault interrupt occurs, the I2C master then polls the multiplexer or switch fault register before activating the sub-branch and reading the individual device.
Some specialized devices have only one I2C address and sometimes several of these identical devices are needed in the same system. The multiplexers and switches split the I2C bus into several sub-branches and allow the I2C master to select and address one of multiple identical devices, thus resolving address conflict issues.
Voltage Level Shifting
Many I2C and SMBus devices operate at different voltage levels but need to operate on a common bus. The multiplexers and switches allow translation between 1.65V and 5.5V.
For example, a 5V I2C master on the upstream channel can communicate with a 3.3V (non-5V tolerant) SMBus device on channel 0 and a 2.5V I2C device on channel 1.
The channel pass gates are constructed such that the VDD pin can be used to limit the maximum high voltage which will be passed by the device. This allows the use of different bus voltages on each pair, so that 2.3V or 3.3V devices can communicate with 5V devices without any additional protection. All I/O pins are 5V tolerant.
The switches are best for voltage level shifting applications since multiple downstream channels can be active at the same time.
Capacitive Load Sharing
Adding more I2C and SMBus devices on the bus may exceed the 400pF limitation. The multiplexers and switches can isolate devices that are not currently needed to reduce the overall system loading and can, therefore, maintain a total load below 400pF. When active, the channels act as a wire and the cumulative capacitive loading of the upstream channel and all active downstream channels must be considered.
2-to-1 I2C Master Selector
The PCA9541 is designed for dual-master, high-reliability I2C applications where continuous maintenance and control monitoring is required even if one master fails or its controller card is removed for maintenance. It can also be used in other applications such as where masters share the same resource but cannot share the same bus or as a gatekeeper multiplexer in long single bus applications or as a bus initialization/recovery device.
Interrupt inputs, one for each of the downstream channels, are provided as an option on both the multiplexers and switches. The single interrupt output acts as an AND of the interrupt inputs and is not latched. The master can read the interrupt register to determine which slave bus sent the interrupt.
An external active low hardware reset pin (/RESET) is provided on the switches in addition to the Power On Reset (POR) feature found on both multiplexers and switches. Either /RESET or POR resets the downstream channels to the default state of no channels selected. These may be used should the bus lock-up and communication with the master be lost. This allows the master to restore communication within the upstream channel and selectively try to restore communication with the downstream channels without having to cycle power for the equipment or for other I2C bus devices.
Up to three hardware pins (A0, A1, A2) are provided to complement the fixed I2C address and allow up to eight identical devices to share the same I2C/SMBus.
PCA954X Operating Characteristics
1 PCA9543A, PCA9543B, and PCA9543C are indentical except for the fixed addresses allowing four of each version on the same bus.
2 PCA9545A, PCA9545B, and PCA9545C are indentical except for the fixed addresses allowing four of each version on the same bus.
I2C/SMBus Multiplexers and Switches
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